Research on the Architecture of Intrinsic Evolvable Digital Circuits

At present, the main research in Evolvable Hardware (EHW) field is focused on the intrinsic evolution based on the virtual reconfigurable circuit. On the basis of previous researches, we take a further explore on designing a virtual reconfigurable architecture for intrinsic evolvable hardware, and propose a virtual circuit architecture based on Look-Up-Table, each evolution module of which can be configured more functionality and more connectively. Then a parallel fitness evaluation module will be introduced for fast fitness computation – normally the most time consuming part of evolution. This intrinsic evolution architecture is implemented in a Xilinx Virtex-II Pro FPGA (XC2VP30) with an embedded PowerPC processor which allows for the processing of hardware software co-evolution. The experimental results show that the new architecture can bring higher evolutional ability and more generality and flexibility than traditional approach to intrinsic EHW.